1. Field of the Invention
The present invention relates generally to packages for integrated circuits, and more particularly to a lead frame format which allows inner lead attachment to a die prior to outer lead attachment to a substrate.
2. Description of the Prior Art
In the manufacture of integrated circuits, silicon wafers containing many separate integrated circuits are fabricated and then cut into individual circuits, each known as a die. Each die is individually packaged, using any one of a variety of known techniques. During packaging, electrically conductive leads are attached to the die, typically by well-known techniques, such as wire bonding or tape-automated bonding. The assembly of the die and the conductive leads is then usually encapsulated in epoxy or some other enclosure for protection.
Tape-automated bonding is a technique for interconnecting an integrated circuit to leads fabricated on a continuous carrier film. The tape is typically a laminate of copper and a plastic insulator, and the leads are etched in the copper while on the plastic carrier using conventional techniques. The film is perforated along one or both edges with sprocket holes used for advancement and registration.
Each pattern of leads, referred to as a frame, includes a central window or opening through the carrier film. The inner ends of the leads overhang the central opening and may be mass bonded to an integrated circuit which is brought into close proximity with the opening, typically by thermocompression, ultrasonic, eutectic, or reflow solder techniques. The outer portion of each lead is connected to a substrate onto which the die is also mounted, and the plastic carrier is excised from the leads prior to final packaging of the device.
It is desirable to test the individual integrated circuits prior to final packaging. It is particularly desirable to test the devices while still attached to the plastic carrier film and prior to final attachment of the lead frame to the substrate. One such testing method is achieved by first bonding the inner ends of the individual leads to the integrated circuit. The circuit is then carried by the carrier film to a testing station where a conventional probe may be attached to the circuit. After the circuit has been tested and found to meet specifications, the device may be bonded to a substrate by conventional means.
Typically, the outer portions of the leads (which are still attached to the carrier film) are formed downward and bonded to the substrate while the inner ends of the lead remain attached to the die. Thus, each lead must have the ability to stretch as the offset introduced by the thickness of the integrated circuit changes the distance between the inner bonding point of the lead and the position of the outer lead on the tape.
Heretofore, the ability to stretch has been provided by a stretch loop comprising a rectangular segment built into the lead, which loop collapses as the lead is elongated by the offset (see FIG. 3). While generally successful, such rectangular stretch loops are much wider than the lead itself and thus prevent close packing of the leads, which inhibits the application of the above-described technique on high lead count devices.